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Tanner S-Edit

物理设计与验证

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<p><span style="color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; text-wrap: wrap;">Tanner S-Edit 是一个面向原理图输入和设计的易于使用的开发环境。它为您提供处理最复杂的混合信号 IC 设计所需的功能。S-Edit 与 Tanner T-Spice、Analog FastSPICE™ (AFS) 或 Eldo® 仿真器、Tanner™ L-Edit IC 版图工具以及 Calibre® LVS 和 PEX 工具紧密集成。S-Edit 可通过优化提高您的生产率并加速概念到芯片的转换，帮助您满足当今快节奏的市场需求。更快的设计周期使您可以更灵活地转向优化的解决方案，为工艺角验证腾出更多的时间和资源。最终可降低下游风险，提高良率并缩短上市时间。</span></p>
Tanner L-Edit MEMS Plus

物理设计与验证

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<p><span style="color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; text-wrap: wrap; font-size: 12px;">Tanner L-Edit MEMS，它是一种高级版图编辑器，具有曲面多边形和任意角度布尔运算等能够支持 MEMS 版图设计的功能。与其他专为机械工程而设计的 CAD 工具不同，L-Edit MEMS 可显示掩膜的 Clear 和 Dark 区域。因此，您可以快速绘制和编辑掩膜，然后轻松查看不同的掩膜组合，以检查它们的重叠和交互情况。利用众多强大的功能，例如出色的曲线支持、交互式 DRC、布尔运算、对象捕捉和对齐，您可以更高效地开展工作，以节省时间和成本。L-Edit MEMS 支持对任意形状、任意曲线的多边形执行复杂的布尔运算和派生层操作，提供了更高的精度。可针对对象组执行 AND、OR、XOR、减法、扩展和收缩等运算和操作。这样，只需要几个轻松绘制的对象，便可快速创建完整、复杂的 MEMS 曲面图形。</span></p>
Tanner L-Edit Photonics

物理设计与验证

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<p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;"><strong>Benefits</strong></span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Supports Siemens PDKs and iPDKs</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Supports interoperability with 3rd-party IP</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Complete, hierarchical physical layout editor</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Standard interface to Calibre physical verification tools</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Supports curved polygons and all-angle geometries</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Fast rendering</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Object snapping (gravity) for quick, accurate layout</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Platform independence with Windows and Linux support</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Ease of use: intuitive and quick learning curve</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;"><strong>Photonic-specific benefits</strong></span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Supports production-level photonic design</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Layout-centric flow with built-in netlisting</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Waveguide generation and editing:</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">        –Waveguide length editing</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">        –Multiple waveguide types</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">        –Waveguide crossing insertion</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •PDKs available from multiple photonic foundries</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Supports multiple photonics simulators</span></p><p><br/></p>
Tanner MEMS Design Flow

物理设计与验证

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<p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;"><strong>Features and benefits</strong></span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •A complete 3D MEMS and IC design solution in one unified environment</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •25 years’ experience with MEMS tools</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Create a MEMS 3D model from layout</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Highly programmable layout editor with MEMS-friendly capabilities, such as curved polygons</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Parameterized layout generators help create complex MEMS structures</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Complete layer and design geometry visualization</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Easily create, place and align MEMS structures with the alignment toolbar or the L Comp composition library</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Design Rule Checking (DRC) for MEMS manufacturability</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Import DXF with boundary reconstruction and export DXF</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •SoftMEMS Tools Upgrade Option:</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">        –Advanced 3D analysis tools: mechanical, thermal, acoustic, electrical, electrostatic, magnetic and fluidic analysis</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">        –System-level simulation, co-simulation of IC design and MEMS device</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">        –Automatically generate behavioral models of MEMS device from 3D analysis results</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Platform independence on Windows or Linux</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Ease of use: intuitive and short learning curve</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Unparalleled customer support</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Flexible licensing</span></p><p><br/></p>
Tanner S-Edit Schematic Capture

物理设计与验证

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<p><span style="font-size: 12px;">Siemens Digital Industries Software helps speed up mixed-signal IC design capture<br/><br/><br/><strong style="font-size: 12px; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica;">Benefits</strong></span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Handles your most complex, full-custom IC schematic capture</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Integration with AFS. Symphony, and Eldo simulators, allowing waveform cross-probing and direct viewing of operating point simulation results in the schematic</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Export formats: SPICE, EDIF, Verilog and VHDL</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Import formats: Native OpenAccess, EDIF, SPICE and Verilog</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Support for inherited connections</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Cross-probe between schematic, layout and Calibre LVS report with net/device highlighting</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Configurable schematic Electrical Rule Checks (ERC)</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Multiple-views per cell including: SPICE, schematic, Verilog, Verilog-A and Verilog-AMS views</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Advanced array and bus support</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">•Integrated with Tanner L-Edit Schematic Driven Layout (SDL) module to speed the layout and ECO process</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">• Multiple library support with integrated library browser</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">• Fully scriptable and expandable using TCL/Tk command language</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">• Offers easy interoperability with third-party tools and foundry PDKs</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">• Platform independence on Windows or Linux</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">• Ease of use: intuitive and quick learning curve</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">• Unparalleled customer support</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">• Flexible licensing</span></p><p><span style="font-size: 12px;"><br/></span><br/></p>
Tanner L-Edit IC

物理设计与验证

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<p><span style="font-size: 12px;">An AMS IC physical design environment from Siemens Digital Industries Software<br/></span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;"><strong>Benefits</strong></span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Complete hierarchical physical layout including all-angle and curved polygons</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Fast rendering</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Reads and writes OpenAccess with multi-user support</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Schematic Driven Layout (SDL) that imports netlists and automatically generates parameterized cells and instances them into your design</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Import Cadence Virtuoso technology and display files</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Interactive (real-time) DRC displays violations as you edit</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Cross-probe between schematic, layout and LVS report to highlight nets or devices</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Node highlighting for connectivity visualization</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Object snapping (gravity) for quick, accurate layout</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Increase routing productivity with automated instancing of parameterized cells, real-time net flylines, net completion tracking, geometry marking/highlighting/by net and ECO tracking</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    •Pad I/O cross reference for easy generation of bonding reports</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    • Platform independence on Windows or Linux</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    • Ease of use: Intuitive and quick learning curve</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    • Unparalleled customer support</span></p><p style="margin-top: 5px; margin-bottom: 5px; overflow-wrap: break-word; color: rgb(0, 0, 0); font-family: "sans serif", tahoma, verdana, helvetica; font-size: 12px; text-wrap: wrap; line-height: 32px;"><span style="font-size: 12px;">    • Flexible licensing</span></p><p><br/></p>

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关于我们

深圳市雅恩信息技术有限公司是全球最大的EDA软件品牌和市场领导者SiemensEDA（Mentor Graphics ）的授权代理商，为广大客户提供专业的销售、技术、咨询、培训服务！西门子EDA软件包括PADS、Xpedition、Hyperlynx、Modelsim、Tanner、Questa、Cabre、Valor、FlothermXT等品牌，涵盖原理图设计、PCB Layout、IC版图设计、FPGA设计仿真、生产制造性检查DFMx、EMI/EMC/信号完整性仿真、热仿真等领域，做到电子设计的完整流程。

深圳市雅恩信息技术有限公司也是国产浩辰CAD设计软件、嵌入式设计软件Keil、电气设计软件Eplan、西门子工业软件NX（UG）和Teamcenter等的核心代理商，致力于工业4.0智能制造的高新技术企业,提供高端的CAD、CAM、CAE、EDA、PDM、PLM软件解决方案，同时提供顾问咨询、系统实施、人员培训、技术支持、定制开发、设计外包等增值服务。

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